Question: When an input signal 1 is applied to a NOT gate, the output is ______________?

• 1. 0
• 2. 1
• 3. Either 0 & 1
• 4. None of the above

Question: Digital circuit can be made by the repeated use of________________?

• 1. OR gates
• 2. NOT gates
• 3. NAND gates
• 4. None of the above

Question: Which mechanism allocates the binary value to the states in order to reduce the cost of the combinational circuits ?

• 1. State Reduction
• 2. State Minimization
• 3. State Assignment
• 4. State Evaluation

Question: What is/are the configurable functions of each and every IOBs connected around the FPGA device from the operational point of view ?

• 1. Input operation
• 2. Tristate output operation
• 3. Bi-directional I/O pin access
• 4. All of the above

Question: In Boolean algebra, the bar sign (-) indicates__________________?

• 1. OR operation
• 2. AND operation
• 3. NOT operation
• 4. None of the above

Question: Which type of CPLD packaging can provide maximum number of pins on the package due to small size of the pins ?

• 1. PLCC
• 2. QFP
• 3. PGA
• 4. BGA

Question: What would happen, if smaller logic modules are utilized for performing logical functions associated with FPGA?

• 1. Propagation delay will increase
• 2. FPGA area will increase
• 3. Wastage of logic modules will not be prevented
• 4. Number of interconnected paths in device will decrease ?

Question: The universal gate is ________________?

• 1. NAND gate
• 2. OR gate
• 3. AND gate
• 4. None of the above

Question: The inputs of a NAND gate are connected together. The resulting circuit is _______________?

• 1. OR gate
• 2. AND gate
• 3. NOT gate
• 4. None of the above

Question: Specific energy consumption becomes________________?

• 1. more on steeper gradient
• 2. more with high train resistance
• 3. less if distance between stops is more
• 4. all of the above